Inglese
I've read the artical Implementing Scalable Atomic Locks for Multi-Core Intel EM64T and IA32 Architectures at http://www3.intel.com/cd/ids/developer/asmo-na/eng/dc/threading/333935.htm
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It says that the cmpxchg is just as expensive as the xchg instruction. Some test data were shown, but no reason was given.
Can anybody explain why those 2 instructions have the same cost to implement lock? Does this cost equivalency only exist for some certain scenarios?